1. Field of the Invention
The present invention relates to a logarithmic compression circuit and particularly to a logarithmic compression circuit which performs logarithmic compression using a transistor.
2. Related Background Art
Prior art logarithmic compression circuits will be described with respect to the drawings.
FIGS. 1A and 1B are schematics of prior art logarithmic compression circuits. Reference numeral 1 denotes an operational amplifier; reference numeral 2 a logarithmic compression transistor; reference numeral 3 an inverting input terminal of the amplifier; and reference numeral 4 a non-inverting input terminal of the amplifier. The signal current flowing into input terminal 3 is converted by transistor 2 into a logarithmically compressed voltage. In the circuit of FIG. 1A, the base terminal of transistor 2 is connected with the collector terminal of same. In the circuit of FIG. 1B, the base terminal of transistor 2 is connected with non-inverting input terminal 4 of the amplifier. According to the circuit construction of FIG. 1A, the occurrence of oscillations is difficult, but the logarithmic compression characteristic is deteriorated when a low signal current is input. According to the circuit construction of FIG. 1B, the logarithmic compression characteristic is good, but, disadvantageously, the circuit is likely to oscillate when a high signal current is input.